Printed from: PhysLink.com; http://www.physlink.com/News/Index.cfm?ID=195
Original publication date: Sunday August 29, 2004.
Detecting the spin of a single electron
Decoherence is the process in which objects of the quantum world -- like electrons -- lose their wavelike characteristics by interacting with the surrounding environment. Electron spin control could be crucial for the creation of nanoscale electronics, the magnetic resonance imaging of single molecules and the development of quantum computers.
In research reported in a recent issue of the journal Nature, Los Alamos scientist Ivar Martin, along with his UCLA colleagues Ming Xaio, Eli Yablonovitch and HongWen Jiang, detected electrically the spin resonance of a single electron in the gate oxide of a standard silicon transistor. The spin orientation of the electron was converted to an electrical charge, which was then measured using a device called a Field effect transistor, or FET. An FET can sense current changes in electrostatic charge.
According to Martin, who developed the theory for the effect together with Los Alamos postdoctoral researcher Dima Mozyrsky, 'We believe this is a significant advance in the field of quantum physics. The more that the fields of science and engineering learn about the enigmatic physics of electron spin, the more we will be able to use that knowledge in the future to create nanoscale technologies like spin electronic and quantum computers, that are based on electron spin control.'
The discovery sets the stage for the practical study of single electron spin physics using test transistors in conventional, commercial silicon integrated circuits. Electron spins in semiconductors have proven particularly attractive for such studies because of their long decoherence times.
In addition, single electron spin resonance opens new opportunities in surface science by allowing researchers to individually study single defects and their environments at the semiconductor-insulator interfaces. This may lead to applications in semiconductor technology where design of reliable devices with ever decreasing feature sizes requires detailed understanding of the interfaces at the nanoscale.